1. Field of the Invention
The present invention relates to a distortion compensating apparatus, and in particular to an apparatus for compensating a distortion generated upon amplifying a linear modulation signal at a power amplifier, a low noise amplifier, or the like used for a wireless communication system or the like.
A power amplifier or the like, which amplifies a linear modulated signal, when an input power exceeds a fixed value as shown by power input/output characteristics of FIG. 19A, exhibits a nonlinear distortion range as shown by a characteristic A. A frequency spectrum of this distortion range in the vicinity of a transmission frequency f0 in the power amplifier causes side lobes to rise as shown by a characteristic D of FIG. 19B, and leak to an adjacent channel, resulting in an adjacent interference.
Accordingly, in order to obtain a linear characteristic B shown in FIG. 19A, it is necessary to preliminarily provide a characteristic C and to obtain a characteristic E after the compensation of a distortion as shown in FIG. 19B.
2. Description of the Related Art
Thus, as an example of a distortion compensating method for obtaining a desired linear signal in which a distortion is removed from the output of an amplifier by preliminarily adding a characteristic opposite to a distortion characteristic of the amplifier to an input signal of the amplifier, an adaptive predistorter (predistortion) type compensating apparatus as shown in FIG. 20 is generally known.
In FIG. 20, a power amplifier 1 amplifies a transmission signal (hereinafter, occasionally referred to as a reference signal) ST to provide an output signal SO, which is sent to a subtractor 2 as a feedback signal SF together with the transmission signal ST. The difference between both signals inputted at the subtractor 2 is sent to an adaptive distortion compensating coefficient (DCC) generator 3.
Then, the adaptive distortion compensating coefficient generator 3 generates a distortion compensating coefficient xe2x80x9chxe2x80x9d based on the output of the subtractor 2 as well as the power or the amplitude of the then transmission signal ST, and multiplies the transmission signal ST by the distortion compensating coefficient h at a multiplier 4, thereby generating a predistorter signal. By inputting this predistorter signal to the power amplifier 1, the output distortion of the power amplifier 1 is compensated.
FIG. 21 shows details of the adaptive predistorter type distortion compensating apparatus as a prior art example (1) (basic arrangement).
In this prior art example (1), the adaptive distortion compensating coefficient generator 3 in the distortion compensating apparatus conceptually shown in FIG. 20 is composed of an inverter 14 for generating a conjugate complex number, multipliers 15-17, an adder 18, an address generator 19, and a distortion compensating table 20. It is to be noted that multipliers 4, 15, and 16 are complex multipliers.
Also, a modulator MOD, which is not shown in FIG. 20, is connected between the power amplifier 1 and the multiplier 4. The modulator MOD is composed of an LPF (low-pass filter) 5, a D/A (digital/analog) converter 6, a local oscillator 7, and a multiplier 8, where a baseband predistorter signal from the multiplier 4 through the LPF 5 is converted into an IF (intermediate frequency) signal.
Also, a digital orthogonal demodulator DEM is provided between the power amplifier 1 and the subtractor 2. This demodulator DEM is composed of an A/D converter 9, a local oscillator 11, a complex multiplier 12, and an LPF 13, where an IF feedback signal SF is converted into a baseband signal SFB to be provided to the subtractor 2.
FIG. 22 shows an arrangement of the digital orthogonal demodulator DEM shown in FIG. 21. The multiplier 12 is composed of complex multipliers 121 and 122, respectively converting an IF feedback signal {circle around (1)} from the A/D converter 9 into signals {circle around (2)} with cos xcfx89t and sin xcfx89t signals from the local oscillator 11.
Since the signals {circle around (2)} include a high frequency component, signals {circle around (3)} only of the baseband are outputted respectively from LPF""s 131 and 132, so that Ich and Qch components of the feedback signal SFB are respectively provided to the subtractor 2.
A distortion amount to be compensated in FIG. 21 is estimated by calculations of the following equations.
hn(p)=hnxe2x88x921(p)+xcexce(t)u*(t)xe2x80x83xe2x80x83Eq.(1)
e(t)=x(t)xe2x88x92y(t)xe2x80x83xe2x80x83Eq.(2)
u(t)=x(t)f(p)≅h*nxe2x88x921(p)y1(t)xe2x80x83xe2x80x83Eq.(3)
hnxe2x88x921(p)h*nxe2x88x921(p)≅1xe2x80x83xe2x80x83Eq.(4)
xe2x80x83y(t)=hnxe2x88x921(p)x(t)f(p)xe2x80x83xe2x80x83Eq.(5)
p=|x2(t)|xe2x80x83xe2x80x83Eq.(6)
In the above equations, x(t) is an input baseband signal, f(p) is a distortion function of the power amplifier 1 itself, hn(p) is a distortion compensating coefficient to be updated, and xcexc is a step size parameter. Furthermore, in the above equations, x, y, f, h, u, and e are complex numbers, and * indicates a conjugate complex number. Also, u(t) is approximated as given in Eq.(4) on the assumption that the amplitude distortion of the power amplifier 1 is not very large.
The meanings of the above equations in the above-mentioned condition will now be described.
In Eq.(1), hn(p) is an estimated distortion compensating coefficient to be updated, and is inputted to the table 20 which stores the distortion compensating coefficients. From an output y(t) of the power amplifier 1, y*(t) is obtained by the inverter 14 which is a conjugate complex number generation circuit. Accordingly, supposing that the estimated distortion compensating coefficient at the last sampling is hnxe2x88x921(p), the output of the multiplier 15 assumes y*(t)hnxe2x88x921(p).
The output of the multiplier 15 is further multiplied by an output e(t) of the subtractor 2 at the multiplier 16 to assume y*(t) hnxe2x88x921(p)e(t). Furthermore, it is multiplied by a step size parameter xcexc at the multiplier 17.
Accordingly, the estimated distortion compensating coefficient to be updated assumes hn(p)=xcexcy*(t)hnxe2x88x921(p)e(t)+hnxe2x88x921(p).
Supposing that y*(t)hnxe2x88x921(p)=u*(t), the distortion compensating coefficient hn(p) can be expressed as the above-mentioned Eq.(1).
Also, e(t) is the output of the subtractor 2 as expressed by Eq.(2), and is an error between the input x(t) and the output y(t). Furthermore, u(t) in Eq.(3) is approximated as expressed by Eq.(4) on the assumption that the amplitude distortion of the power amplifier 1 is not very large. Accordingly, the conjugate complex number u(t) of u*(t) is expressed as Eq.(3).
Eq.(6) means that the address generator 19 is a circuit for determining the power of the input signal x(t). When it is supposed to be a circuit for determining the amplitude of the input, Eq.(6) is expressed by |x(t)|. Alternatively, when it is supposed to be a function of the power or the amplitude, Eq.(6) is expressed by g(|x(t)|2) and g(|x(t)|), respectively.
Furthermore, the value determined by the address generator 19 assumes a write/read address for the table 20 storing the distortion compensating coefficient hn(p).
In case where a write update and a multiplication of the estimated distortion compensating coefficient hn(p) with the input signal x(t) are independently performed, predistortion is always enabled without an influence of a delay on the system.
Thus, in the above-mentioned prior art example (1), the distortion compensating coefficient hn(p) is generated referring to the distortion compensating table, and is multiplied by the transmission signal ST, thereby preliminarily generating the predistorter signal. Thus, the characteristic of the power amplifier 1 is corrected to the characteristic B by the signal having the characteristic C as shown in FIG. 19A.
On the other hand, as another arrangement for enhancing the speed of the D/A converter in the modulator by separately handling a main signal (transmission signal) and a compensating signal (distortion compensating component of power amplifier), and for effectively utilizing a dynamic range, a prior art example (2) called a compensating signal separation system as shown in FIG. 23 has already been proposed.
This prior art example (2) is different from the prior art example (1), as shown in FIG. 23, in that while the transmission signal is provided to an adder 63 as a main signal through an LPF 51 and a D/A converter 61, the transmission signal is provided to the adder 63 as a compensating signal through a multiplier 72, the LPF 51, and a D/A converter 62, whereby the output from the adder 63 is provided to the multiplier 8 as the predistorter signal.
Also, the prior art example (2) is different from the prior art example (1) in that an adder 71 for subtracting a coefficient 1+j0 from the distortion compensating coefficient hn(p) outputted from the distortion compensating table 20 is provided between the distortion compensating table 20 and a multiplier 70 in order to subtract the transmission signal itself.
In the above-mentioned prior art example (1), a phase difference between the transmission signal and the feedback signal is generated in the range of 0-360xc2x0 at random. Supposing that there is no distortion in the power amplifier 1 and that the phases of the transmission signal and the feedback signal coincide with each other, the distortion compensating coefficient hn(p) always provides 1+j0 when a distortion compensating operation (distortion compensating coefficient generation) is started, and the then predistorter signal can be expressed by the following equation.
Transmission signalxc3x97distortion compensating coefficient=(TxIch+jTxQch)(1+j0)=TxIch+jTxQchxe2x80x83xe2x80x83Eq.(7)
Also, when the phase difference between the transmission signal and the feedback signal is 180xc2x0 (opposite phase) under the distortion compensating operation being not performed, the distortion compensating coefficient after the distortion compensating operation assumes xe2x88x921+j0. Therefore, the predistorter signal at this time can be expressed by the following equation.
Transmission signalxc3x97distortion compensating coefficient=(TxIch+jTxQch)(xe2x88x921+j0)=xe2x88x92TxIchxe2x88x92jTxQchxe2x80x83xe2x80x83Eq.(8)
Thus, the distortion compensating operation is performed, and the distortion compensating coefficient hn(p) after a convergence is expressed by a vector as shown in FIG. 24.
Supposing that an initial value of the distortion compensating coefficient hn(p) is 1+j0 as shown in FIG. 24, the difference between the initial value and a desired distortion compensating coefficient after the convergence becomes larger as the phase difference between the transmission signal and the feedback signal becomes larger. Therefore, it has been disadvantageous that the convergence of the distortion compensating coefficient is delayed in the above-mentioned prior art example (1).
Also, when the phase difference between the transmission signal and the feedback signal is 0xc2x0 in the prior art example (2), the compensating signal component is 0. When the phase difference between the transmission signal and the feedback signal is 180xc2x0, the compensating signal assumes, as shown in FIG. 19A and FIG. 24, a signal whose phase is inverted by 180xc2x0 with respect to the main signal and whose amplitude is twice as much.
FIGS. 25A-25C show a representation or expression range of the main signal and the compensating signal in consideration of an amplitude distortion 6 dB (to be corrected up to twice as much in amplitude). Namely, under the distortion compensating operation being not performed, as the phase difference between the transmission signal and the feedback signal becomes larger, the representation range of the compensating signal becomes larger for the main signal in FIG. 25A, and assumes the maximum range when the phase difference is 180xc2x0.
Supposing that an input bit number of the D/A converter 6 in the modulator MOD are 16 bits (xe2x88x9232768-+32767), the representation range of the compensating signal when a phase adjustment between the transmission signal and the feedback signal is not performed exhibits as shown in FIG. 25C, and is twice as wide in range as that in the case of the phase difference=0xc2x0 (when the phase adjustment is performed) shown in FIG. 25B.
When 16 bits are assigned to the input of the D/A converter 6 in consideration of the signal of the phase difference 180xc2x0, the signal in FIG. 25B whose phase difference is 0xc2x0 has no choice but to be represented by the half (xe2x88x9232768/2-+32767/2=xe2x88x9216384-+16383), 15 bits.
Thus, in either prior art example, the power amplifier used especially for W-CDMA or the like has an original signal to which a sign multiplexing is performed and in which an amplitude variation is large, and which is a broadband signal due to a direct spectrum diffusion modulation. Therefore, high bit accuracy and high-speed conversion rate are required for the D/A converter, and when such a requirement is not satisfied, the distortion compensating characteristic deteriorates.
It is accordingly an object of the present invention to provide an adaptive predistorter type distortion compensating apparatus for calculating a distortion compensating coefficient by using an adaptive algorithm so as to reduce an error between a reference signal and a feedback signal of a circuit which generates a distortion on a basis of the reference signal, and for compensating the distortion by providing the distortion compensating coefficient to the reference signal, whereby an initial value of the distortion compensating coefficient and the coefficient after a convergence can be always operated in a mutually close state by constantly making a phase of a transmission signal and that of the feedback signal coincide with each other, a convergence time can be shortened, and an effective bit number of a D/A converter can be fully utilized.
In order to achieve the above-mentioned object, a distortion compensating apparatus according to the present invention comprises: a phase adjustment circuit for determining a phase shift value which reduces a phase difference between a reference signal and a feedback signal, and for correcting the phase of the reference signal or the feedback signal by the phase shift value. (claim 1)
Namely, in the present invention, as shown in a basic arrangement of FIG. 1, a phase adjustment circuit 10 for setting a phase shift value xcfx891 is provided for the local oscillator 11 in the demodulator DEM of the prior art example (1) shown in FIG. 21.
The phase shift value xcfx891 is for making a phase of a reference signal (transmission signal) ST and a feedback signal SF coincide with each other. By this phase shift value xcfx891, as shown in FIG. 1, the phase of the feedback signal is corrected to be made coincide with the reference signal ST. Then, a calculation of a distortion compensating coefficient is performed. It is to be noted that while the phase of the feedback signal is corrected in the example of FIG. 1, it is also possible to correct the phase of the reference signal ST similarly, to provide an error signal from a subtractor 2 to a distortion compensating coefficient generator 3, and to determine the distortion compensating coefficient similarly.
The above-mentioned phase adjustment circuit may determine the phase shift value from the distortion compensating coefficient.
(claim 2)
In this case, when a real part of the distortion compensating coefficient is positive and an absolute value of an imaginary part is equal to or less than a predetermined value, it is not particularly necessary to make the phases coincide with each other. Therefore, except that case, the phase shift value may be determined based on a sign of the imaginary part. (claim 3)
Namely, except when a real part of the distortion compensating coefficient is positive and an absolute value of an imaginary part is equal to or less than a predetermined threshold value, a phase shift value for a phase adjustment is determined since the phase difference between the reference signal and the feedback signal is large. Based on this phase shift value, the phase of the reference signal or the feedback signal is corrected, and then the calculation of the distortion compensating coefficient may be performed.
Also, the above-mentioned phase adjustment circuit may determine the phase shift value from a correlation between the reference signal and the feedback signal. (claim 4)
Namely, when the phases of both signals are coincident with each other, a real part of a correlation calculation result takes a maximum value, so that an imaginary part assumes 0. Therefore, when the imaginary part is positive or negative to the contrary, the phase shift value is determined in the same way as the above, and the above-mentioned phase correction and the calculation of the distortion compensating coefficient based on the phase correction are performed.
Also, the above-mentioned phase adjustment circuit may include an up/down counter for adding the sign of the imaginary part, a phase update determination circuit for deciding whether or not a counter value of the up/down counter has reached a fixed value, and a phase counter for updating the phase shift value when the phase update determination circuit decides that the counter value has reached the fixed value. (claim 5)
The above-mentioned phase update determination circuit may change the above-mentioned fixed value according to a phase adjustment stage (progress). (claim 6)
Namely, while it is necessary to perform a phase correction at high speed immediately after the start of the phase adjustment, with the above-mentioned fixed value, i.e. a small time constant, the time constant can be made larger as the phase correction progresses, thereby enabling stability to be increased.
Furthermore, the above-mentioned phase adjustment circuit may determine the phase shift value from the error between the reference signal and the feedback signal. (claim 7)
Namely, since the error between the reference signal and the feedback signal becomes larger as the phases of both signals deviate from each other, an optimal phase shift value is selected from among a plurality of values so that the error signal may become minimum.
Furthermore, the above-mentioned phase adjustment circuit may decide a presence/absence of an update of the distortion compensating coefficient, and may determine the phase shift value based on the above-mentioned distortion compensating coefficient only in presence of the update. Alternatively, the phase shift value may be determined from the correlation or the error between the above-mentioned reference signal and the feedback signal in absence of the update of the distortion compensating coefficient. (claims 8 and 9)
Namely, based on xe2x80x9cpresence/absencexe2x80x9d of an update of the distortion compensating coefficient, the phase adjustment is performed by using the above-mentioned distortion compensating coefficient in the presence of the update of the distortion compensating coefficient, and the phase adjustment is performed by using the correlation value or the error signal of the above-mentioned reference signal and feedback signal in the absence of the update of the distortion compensating coefficient.
Furthermore, the above-mentioned phase adjustment circuit may determine the phase difference between the reference signal and the feedback signal by a quadrant determination of a complex plane at an initial stage of the phase adjustment. (claim 10) Furthermore, the phase difference between the reference signal and the feedback signal may be determined with high accuracy by the quadrant determination of the complex plane and a large/small comparison of a real part and an imaginary part. (claim 11)
Namely, sign bits of the real part and the imaginary part of the reference signal, or those of the feedback signal are compared, and a large/small comparison of the real part and the imaginary part is performed. If the determination result of the comparison is used, it is recognized at which angle range the reference signal phase is located within 360xc2x0. If the feedback signal is similarly determined, the phase difference between both signals can be determined. Thus, if the phase of both signals is made coincident with each other by the initial phase difference, it becomes possible to drive the phase difference within a predetermined angle range by a single trial when the phase correction is started.
The distortion compensating apparatus described above can be applied not only to a basic system, as shown in FIG. 1 or FIG. 21, of directly inputting the predistorter signal obtained by multiplying the distortion compensating coefficient by the reference signal to the power amplifier 1 as the distortion generation circuit, but also to a compensation signal separation system shown in FIG. 23, i.e. a system of adding the compensating signal being multiplied by the reference signal to the reference signal to provide the predistorter signal and of inputting the predistorter signal to the distortion generation circuit.